(a) Field of the Invention
The present invention relates generally to flat panel displays. More specifically, the present invention relates to.
(b) Description of the Related Art
Liquid crystal displays are one common form of flat panel displays. A liquid crystal display typically has two display panels on which electrodes are formed, with a liquid crystal layer interposed therebetween. In such a liquid crystal display, voltages are applied to the electrodes so as to align liquid crystal molecules of the liquid crystal layer. This alignment controls the light transmittance of the liquid crystal layer, thereby allowing for the display of images.
One of the two display panels of the liquid crystal display typically includes a thin film transistor (TFT) array panel that is used, in effect, as a circuit board for independently driving pixels in the liquid crystal display. It should also be noted that this general approach can also be utilized in other types of displays, such as organic electro luminescence (EL) display devices.
The thin film transistor array panel commonly includes a signal wire or a gate wire transmitting a scanning signal, an image signal line or a data wire transmitting an image signal, a thin film transistor connected to the gate wire and the data wire, a pixel electrode connected to the thin film transistor, a gate insulating layer covering the gate wire for insulating, and an interlayer insulating layer covering the thin film transistor and the data wire.
To manufacture this TFT array panel, a photosensitive film is typically formed for every layer deposited, and these layers are etched by using the photosensitive films as masks to form the pattern of each layer.
When the semiconductor layer of the TFT is an oxide semiconductor, an etching preventing layer is typically formed thereon, to reduce damage to the oxide semiconductor caused by etching of the TFT's source and drain electrodes. However, both the etching preventing layer and the mask typically required for forming this etching preventing layer add to the cost and complexity of the manufacturing process.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention. It therefore may contain information not in the prior art.